Advanced Computing in the Age of AI | Monday, August 8, 2022

New TI SoC Halves System Costs 

Texas Instruments is challenging makers of field programmable gate arrays (FPGAs) and targeting high-performance vertical markets with today's release of its Keystone-based 66AK2L06 System-on-Chip (SoC).

The solution, which uses the JESD204B interface standard, cuts the total board footprint by 66 percent, according to TI. Using this standard also enables customers to create products with higher performance that use up to half the power, the Dallas-based developer said. And since many users are in markets such as avionics, defense, medical, and test and measurement where space, power, and performance are critical, TI expects these benefits to deliver quantifiable results.

After all, many in these – and other – industries want to move capabilities from stationary equipment to mobile devices, Robert Ferguson, marketing director and business manager of Communications Processors at TI, told Enterprise Technology. TI's new SoC allows customers to develop three times faster than with FPGAs or with competing solutions, according to TI.

"We're reducing two processing solutions to one and that's where you get that processing and power savings," he said. "For this SoC, we are getting requests for all market segments and all the top players for demos and visits. Right now, we're probably seeing the greatest pull in the avionics [and] radar defense industry, probably second by test and measure. In medical, you can think of who we're already talking to."

To help developers bring their products to market faster, the 66AK2L06 SoC includes TI's Digital Signal Processing (DSP) programmability and pre-validation of many high-speed analog to digital converters (ADCs), digital to analog converters (DACs), and analog front-ends (AFEs), as well as the Multicore Software Development Kit (MCSDK) and RF Software Development Kit (RFSDK).

Critics of FPGAs cite the programmable devices' use of power: They can create static power, causing leaks that enter the FPGA without being used, generating the possibility of thermal runaway, according to StreetDirectory. While vendors developed low-power FPGAs that use less static and active dynamic power and work for wireless applications, some pundits worried about design constraints, power and clock gating, battery operation, and internal USB power capabilities.

Advocates point to FPGAs' ability to perform in enterprise-level datacenter environments. There's certainly plenty going on: Microsoft, for example, is using FPGAs to speed up Bing Search. And Intel was interested in acquiring Altera, until the chipmaker rejected the offer of about $54 per share earlier this month.

Diving into TI's Details

Building on TI's KeyStone multicore architecture, the 66AK2L06 SoC includes a Digital Front End (DFE)/Digital Down Converter-Up Converter (DDUC) and JESD204 interface, plus TI's DSP and ARM Cortex processors. Each of the four TMS320C66x DSP cores delivers up to 1.2 GHz of signal processing to give customers programming flexibility via floating point, according to TI. Dual ARM Cortex-A15 MPCore processors provide up to 1.2GHz and enable real-time direct access to I/Os with low latency.

"From a hardware perspective and tools perspective, Texas Instruments has an initiative called TI Designs, a way to give customers time by taking some of the work off their plate," Ferguson said.

Accessible across all DSP cores, TI's Fast Fourier Transform Coprocessor (FFTC) module is designed to speed up the FFT and IFFT computations intensive applications such as radar systems require, TI said. The network coprocessor has four gigabit Ethernet modules for sending and receiving packets from an IEEE 802.3-compliant network; a packet accelerator, and a security accelerator.

TI bases its lower power usage claims on its adaptive power technology. An integrated wideband sample rate conversion and digital filtering up to 48 channels that removes any need for another device – reducing the board size by two-thirds, the company said. In terms of the SoC's configurable and customization capabilities, developers can immediately change DFE configurations after deployment via software and can store multiple configurations in either DDR or flash memory and switch them dynamically, according to TI. By integrating the DFE and JESD204B interface, users can change filters to optimize via software programmability in days, not weeks, the company said. As a result of the 66AK2L06 SoC's design, overall system costs are halved, TI said.

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