Advanced Computing in the Age of AI|Thursday, August 13, 2020
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I/O Project Looks to Bridge Memory-Storage Gap 

A European-led initiative will seek to overcome I/O bottlenecks for HPC workloads resulting from too many processors communicating with slow disk storage. The project also would leverage Intel Corp.'s new 3D memory technology unveiled earlier this year.

The NextGenIO project announced on Monday (Nov. 16) is led by the EPCC (formally the Edinburgh Parallel Computing Center) at the University of Edinburgh and also includes Intel (NASDAQ: INTC) and Fujitsu (OTCMKTS: FJTSY). Organizers said the project would develop a prototype system built around non-volatile memory modules provided by Fujitsu and Intel.

The announcement was timed to coincide with this week's SC15 conference in Austin, Texas.

Among the projects goals is implementing tighter links between computing and data management using much faster memory technologies designed to access huge data sets. Those links are designed to close current gaps in HPC data storage and computing. "As we move into the domain of extreme parallelism at the Exascale we need to address this I/O challenge if such systems are to deliver appropriate performance and efficiency for their application user communities," organizers said.

Hence, the I/O project would target emerging non-volatile memory technologies and related system development using a "co-design process" involving a high-end academic HPC service provider, a global numerical weather center and a commercial on-demand HPC service provider.

The partners also said they plan to develop an I/O workload simulator "to allow quantitative improvements in I/O performance to be directly measured on the new system in a variety of research configurations." The project will develop analysis tools, improved job schedulers that take into account data locality and energy efficiency, optimized programming models along with APIs and drivers customized for new I/O architecture.

The effort marks one of the first applications of Intel's 3D XPoint non-volatile memory technology unveiled by the chipmaker in July. The three-dimensional "cross point" architecture is billed as delivering a 1,000-fold increase in non-volatile memory speeds that would provide "fast access to large sets of data."

Intel and development partner Micron Technology Inc. (NASDAQ: MU) claimed last summer that the new non-volatile memory technology significantly reduces the lag time between memory, stored data and processing. That, they said, would allowing more data to be stored closer to processors while boosting access speeds “to enormous data sets” beyond the performance delivered by other non-volatile storage technologies.

Latency for 3D Xpoint technology is measured in "10s of nanoseconds," an order of magnitude faster than current NAND technology, they asserted. Both chipmakers said they would begin sampling Xpoint technology later this year while each develops unspecified products.

The NextGenIO consortium is among the first users to get a crack at applying the new memory technology. "Intel’s 3D XPoint memory is going to impact all areas of computing over the next five years," Mark Parsons, NEXTGenIO project coordinator, stressed in a statement.

The European Commission is funding the three-year NextGenIO initiative. Other partners include the Technische Universität Dresden, Barcelona Supercomputing Center, the European Center for Medium-Range Weather Forecasts, software development tool vendor Allinea and HPC services provider Arctur.

About the author: George Leopold

George Leopold has written about science and technology for more than 30 years, focusing on electronics and aerospace technology. He previously served as executive editor of Electronic Engineering Times. Leopold is the author of "Calculated Risk: The Supersonic Life and Times of Gus Grissom" (Purdue University Press, 2016).

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