Advanced Computing in the Age of AI | Monday, January 30, 2023

Toshiba, SanDisk Ready High-Density Flash 

Flash memory joint venture partners SanDisk Corp. and Toshiba have released the production schedule for a new generation flash device destined for ultra-high density storage devices.

SanDisk and Toshiba America Electronics Components Inc. based on Irvine, Calif., this week claimed development of the first 256-gigabit (32 gigabyte) stacked cell NAND flash memory based on Toshiba's Bit Cost Scalable (BiCS) flash technology. The three-dimensional, 48-layer device also integrates 3-bit-per-cell triple-level cell technology, the partners said.

BiCS flash technology has been ramping up since Toshiba announced the first prototype BiCS device in 2007. The current 256-gigabyte memory storage device is based on an advanced 48-layer stacking process that increases memory density well beyond two-dimensional NAND flash memory.

Intel and Micron Technology recently announced what they claimed is a new category of non-volatile memory based on new materials and a 3-D "cross point" architecture. However, skeptics note that Intel and Micron disclosed few details about the materials used or the switching mechanism.

Intel, Micron, Samsumg, Toshiba and other chipmakers are increasingly targeting the booming enterprise storage market with high-density flash memory at the core of solid-state drives and other storage products.

Toshiba and SanDisk said they are continuing to push the density limits of traditional NAND flash memory technology by leveraging 3-D stacking architectures. The partners described BiCS as a non-volatile memory architecture designed to boost scaling and performance along with memory density. It is also touted as improving write/erase endurance on solid-state drives and other storage devices.

Along with consumer SSDs, the partners said the 256-gigabit chip is headed for other consumer devices and enterprise SSDs for datacenters.

The new flash chip also leverages Toshiba's floating gate technology based on 15-nm die process technology. The company said its BiCS technology also represents a "smooth migration" to 3-D flash memory designed to meet storage industry demand for greater memory density.

The BiCS approach uses a "charge trap" made from insulating material to prevent electronics from leaking between layers, thereby improving reliability.

The partners said they expect the new memory chip to help meet growing demand for flash memory as they ramp up production in 2016. Sandisk said it expects to begin shipping SSDs and other storage products based on BiCS flash technology next year.

SanDisk, Milpitas, Calif., said pilot production of its 3-D NAND flash chip has begun at a Toshiba fab in Yokkaichi, Japan. Sample shipments of the BiCS flash memory will start on September, Toshiba added. Volume production of BiCS flash chips will commence after completion of the new Fab2 during the first half of 2016.

The Toshiba-SanDisk announcement underscores how the 3-D NAND race is heating up among leading chipmakers. Samsung Electronics announced last October it was launching volume production of its second-generation "vertical NAND" memory chip with 32 cell layers and 128 megabits of memory storage.

About the author: George Leopold

George Leopold has written about science and technology for more than 30 years, focusing on electronics and aerospace technology. He previously served as executive editor of Electronic Engineering Times. Leopold is the author of "Calculated Risk: The Supersonic Life and Times of Gus Grissom" (Purdue University Press, 2016).

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