Advanced Computing in the Age of AI | Sunday, October 2, 2022

Flash Successor Delivers: Faster, Denser and Low-Power 

Startup Crossbar emerges from stealth mode with a new class of flash memory that is substantially faster and more energy-efficient than existing NAND technology. More compact too: 1 TB of data fits on a chip smaller than a postage stamp. 

Crossbar has emerged from stealth mode with a new flash memory technology that can scale to 1 terabyte on a single chip. The Santa Clara, Calif.-based startup has invented a new kind of non-volatile memory, based on resistive RAM (RRAM) technology. A single 200mm2 chip can store 250 hours of HD movies in a form factor that's smaller than a postage stamp.

The new memory class also enables multiple terabytes to be stored with 3D stacking technology. The company has developed a working array with a commercial fab partner, validating the manufacturability and simplicity of its technology and signaling its production-ready status.

Compared to traditional NAND flash memory, the advantages of Crossbar's RRAM technology are impressive. Crossbar claims 20 times faster write performance, 20 times lower power consumption, and 10 times the endurance from a die that is 50 percent smaller. The company believes the combination of performance, low-power and reliability will enable a wide range of breakthroughs across a spectrum of applications.

"Non-volatile memory is ubiquitous today, as the storage technology at the heart of the over a trillion dollar electronics market – from tablets and USB sticks to enterprise storage systems," said George Minassian, chief executive officer, Crossbar, Inc. "And yet today's non-volatile memory technologies are running out of steam, hitting significant barriers as they scale to smaller manufacturing processes. With our working Crossbar array, we have achieved all the major technical milestones that prove our RRAM technology is easy to manufacture and ready for commercialization. It's a watershed moment for the non-volatile memory industry."

Most RRAM setups employ a switch material sandwiched between two metallic electrodes, but Crossbar's design consists of "a non-metallic bottom electrode, an amorphous silicon switching medium and a metallic top electrode."

Memory state is stored via a change in resistance rather than an electrical charge, a process that requires less energy and allows information to be stored at a higher density. 

The simple cell structure helped the company overcome one of the main challenges encountered by other RRAM designs: manufacturability. Because of its CMOS compatibility, logic and memory can be integrated onto a single chip at current technology nodes without any special equipment or materials.

As the popularity of flash memory has demonstrated, high-capacity, low-power storage mediums are a hot commodity. When it comes to consumer electronics, like mobile phones and tablets, the demand is there for faster storage and more of it to support playback, backup and archiving.

On the enterprise storage side, the Crossbar array promises to help extend SSD reliability and capacity and improve performance for datacenter and cloud storage systems.

With an eye toward the future, Crossbar envisions a place for its technology within the Internet of Things and the Industrial Internet. Because of its energy-efficiency and its ability withstand wide temperature ranges, there is the potential for many types of connected applications. The prospect of high capacity, low-power storage in a small form-factor should appeal to the wearable computing community as well.

All told, the market for non-volatile memory is expected to reach $60 billion by 2016. With traditional non-volatile memory technologies struggling to keep up with skyrocketing data demands, the opportunity is ripe for a successor to the current generation of flash technology. With a successful demonstration product on the table, Crossbar looks to have an advantage. The company is still tweaking the design and plans to bring its first product to market in the embedded SOC space.

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